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NXP Semiconductors /LPC15xx /C_CAN0 /BT

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Interpret as BT

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0BRP0SJW0TSEG10TSEG20RESERVED

Description

Bit timing register

Fields

BRP

Baud rate prescaler The value by which the oscillator frequency is divided for generating the bit time quanta. The bit time is built up from a multiple of this quanta. Valid values for the Baud Rate Prescaler are 0 to 63.[1]
SJW

(Re)synchronization jump width Valid programmed values are 0 to 3.[1]
TSEG1

Time segment before the sample point Valid values are 1 to 15.[1]
TSEG2

Time segment after the sample point Valid values are 0 to 7.[1]
RESERVED

Reserved

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data